National Institute of Standards and Technology


Implementation Guidance for FIPS PUB 140-1, continued

PART 3 (sections 5-7)

Continued from Part 2 (sections 1-4)

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Section 5 - Physical Security

5.1 Conformal coating features

Applicable Levels: 2, 3, 4 (multi-chip embedded)
Effective Dates: 2/25/97-
Last Modified:
Relevant Assertions: AS05.09
Relevant Test Requirements: TE05.09.01
Relevant Vendor Requirements: VE05.09.01


Question/Problem

If the conformal coating used to encapsulate a multiple-chip, embedded cryptomodule can be scratched, without marking the cryptomodule, so that writing can be read off of an embedded feature (e.g., memory chip, processor, capacitor, etc.), does this meet the requirement for tamper evidence? This might be possible if the color of the coating is identical to (or close to) the color of the underlying feature.

Resolution

Since the conformal coating is supposed to be visibly opaque, no writing on an embedded feature shall be visible. Therefore if writing is visible, that in itself can be considered as evidence of tampering. One way that this might be more effective in providing tamper evidence, is if the color of the coating contrasts with the colors of underlying features on the encapsulated cryptomodule module.

Additional Comments


5.2 Tamper evidence requirements and logical module interfaces for PC-like modules

Applicable Levels: 2, 3, 4 (multi-chip standalone and embedded)
Effective Dates: 2/25/97-
Last Modified:
Relevant Assertions: AS05.09, AS05.19, AS02.02
Relevant Test Requirements: TE05.09.01, TE05.19.01, TE02.02.01-.04
Relevant Vendor Requirements: VE05.09.01, VE05.19.01, VE02.02.01-.04


Question/Problem

If a personal computer is to be implemented as a cryptomodule with physical security of level 2 or higher, how does one treat the keyboard and other similar devices, with respect to tamper evidence?

Resolution

In a typical PC configuration consisting of a monitor, keyboard, and system unit (containing the motherboard, memory, microprocessor(s), circuitry that comes in contact with security-relevant data), one may define the enclosure containing the system unit as the cryptomodule boundary, with the monitor and keyboard existing outside of that boundary. As such, there are several ports that function as module interfaces:

  1. Keyboard port - logical data input interface;
  2. Disk drive and network "ports" - logical data input/output interfaces; and
  3. Monitor and printer port - logical data output interfaces.

The standard defines a port ("a functional unit of a cryptographic module through which data or signals can enter or exit the module"[Section 2.1]), and makes a distinction between ports and covers ("Documentation shall include a complete specification of the interfaces of a cryptographic module, including any physical or logical ports, physical covers or doors..."[Section 4.2]). At level 2 and above, there are no requirements or tests for tamper evidence other than on removable covers and doors. Thus, there are no requirements for tamper evidence on the various ports listed above (e.g., there does not have to be a tamper evident seal on the keyboard jack where it plugs into the keyboard port, etc.)

Additional Comments

This guidance can also be applied to multi-chip embedded modules, such as a PC adapter, which has input/output ports.


5.3 Additional tamper evidence for embedded modules

Applicable Levels: 2, 3, 4 (multi-chip embedded)
Effective Dates: 2/25/97-
Last Modified:
Relevant Assertions: related to AS05.09
Relevant Test Requirements:
Relevant Vendor Requirements:


Question/Problem

What kind of tamper evidence is provided if the cryptomodule is embedded inside a larger device (e.g., it is an adapter inside a computer?

Resolution

In the case where an embedded cryptomodule is used inside a larger embodiment, there are no tamper evidence requirements on that larger embodiment. For example, if the cryptoboundary is defined to only contain an adapter, and it is used inside a PC, there is no requirement in FIPS 140-1 to provide tamper evidence on the cover of the PC. The only place where place where tamper evidence is applicable (at level 2 and higher) is on the adapter itself.

Therefore, it may be desirable for the vendor or customer to use tamper evident measures (e.g., cover locks, tamper evident seals, etc.) on the larger embodiment that contains the embedded cryptomodule. However, this lies outside the scope of this standard.

Additional Comments


5.4 Tamper evidence for cryptomodules with physical security at levels 3 and 4

Applicable Levels: 3, 4
Effective Dates: 2/25/97-
Last Modified:
Relevant Assertions: AS05.03, AS05.09, AS05.19
Relevant Test Requirements: TE05.03.01, TE05.09.01, TE05.19.01
Relevant Vendor Requirements: VE05.03.01, VE05.09.01, VE05.19.01


Question/Problem

For cryptomodules that are targeting levels 3 and 4 for physical security, do they also have to meet tamper evidence requirements for modules with level 2 physical security?

Resolution

The entire rationale of FIPS 140-1 is to provide for increasing levels of security; thus each level adds new features, and builds upon the previous levels.

Tamper evidence and tamper detection/response are not necessarily mutually exclusive. The former warns the valid cryptomodule user that a tamper attempt has occurred, whether it has been successful or not, while the latter protects the cryptomodule from such tamper attempts. In addition, there may be cases where a failure in a module may cause it to be zeroized or disabled (e.g., a blown power supply). There may be cases where keys are zeroized, and without tamper evidence features, there would be no indication that tampering had occurred. The user is left to guess whether zeroization occurred because of tampering or some "natural" failure of the module. Awareness of such tampering would necessitate a more drastic course of action rather than just a simple maintenance procedure, which might be the response if the module simply indicates that keys were zeroized.

The standard and DTR are clear in the area of physical security, in that to meet a particular level, all requirements from lower levels must also be met for a particular type of implementation (e.g., single chip, multi-chip embedded, and multi-chip standalone).

Additional Comments


5.5 Physical security requirements (Level 2) for multi-chip standalone cryptographic modules

Applicable Levels: 2 (multi-chip standalone)
Effective Dates: 9/16/96-
Last Modified:
Relevant Assertions: AS05.19
Relevant Test Requirements: TE05.19.01
Relevant Vendor Requirements: VE05.19.01


Question/Problem

What are the Level 2 security requirements pertaining to enclosures designed to be non-removable, but which may be removed by force?

Resolution

  1. The fact that a cryptomodule's enclosure is designed to be non-removable does not imply that it is, in fact, non-removable. When testing a multi-chip standalone module for Level 2 compliance, the tester shall attempt to remove the cryptomodule's enclosure, even in cases where the manufacturer claims that the enclosure is non-removable. The tester shall apply a level of effort necessary to remove the cover. (Note that the definition of a "removable cover" - as opposed to a non-removable enclosure - is being reviewed by NIST and CSE.)
  2. When a tester opens and closes the enclosure, attempting not to leave evidence of tampering, the time taken to accomplish this shall NOT include the time (or estimated time) needed to tamper with the cryptomodule's internal electronic components. This time shall include the time required to remove any additional physical barriers (e.g., epoxy over the components or internal shields) such that the internal electronic components of the cryptomodule can be accessed, and the "drying time" necessary for any sealant that is used to close and reseal the enclosure.
  3. The tester shall only use tools and materials that are readily available in places such as a hardware store or hobby shop. The use of extremely expensive tools (e.g., a laser) are excessive for Level 2 physical security testing.
  4. In opening and closing the enclosure, a tester shall use only cryptomodule components that are part of the cryptomodule being tested. For example, a tester shall not use another enclosure, label, or seal in place of the original.
  5. The tester shall have some experience attempting to open and close the cryptomodule; however, the tester is not assumed to be an expert at penetrating the cryptomodule being tested. Rather, the assumption is that the tester has experience with LESS THAN 10 instances of the cryptomodule being tested.

Additional Comments

  1. If a tester needs 2 hours or more to open the enclosure, gain access to the internal electronic components, and close the enclosure on a cryptomodule WITHOUT leaving evidence of tampering, then this is sufficient for passing test TE05.19.01.
  2. "Detectable signs" and "tamper evidence" shall include both inoperability and visual evidence on the cryptomodule itself. Inoperability may include situations where an attempt to operate the cryptomodule requires a significantly greater physical effort than normal (e.g., a PC Card or smart card that cannot be easily placed (or fits too loosely) in its slot or reader/writer.).


5.6 Key loader physical security requirements at Level 3

Applicable Levels: 3
Effective Dates: 2/25/97-
Last Modified:
Relevant Assertions: AS05.10, AS05.20
Relevant Test Requirements: TE05.10.04, TE05.20.04
Relevant Vendor Requirements: VE05.10.01, VE05.20.01


Question/Problem

Do the physical requirements at Level 3 pertain to a key loader if it is included as part of the cryptomodule?

Resolution

If a key loader is defined within the cryptographic boundary, and the key loader contains plaintext cryptographic keys or other unprotected security parameters, then these must be zeroized under the conditions stated in TE05.20.04. If the key loader is not defined within the cryptographic boundary, then the key loader is beyond the scope of FIPS PUB 140-1; however, the key entry requirements place restrictions on how the key loader can present keys to and receive keys from the cryptographic module.

VE05.20.01 states that "the circuitry shall be operational whenever plaintext cryptographic key, or other unprotected critical security parameters, are contained within the module."; this is done even when the module is not powered up (e.g., circuitry operated using battery power).

Additional Comments

In typical cases, a key loader shall not be included within the defined cryptoboundary.


5.7 Tamper response/zeroization circuitry on removable covers and doors for embedded and standalone modules

Applicable Levels: 3, 4
Effective Dates: 3/21/97-
Last Modified: 11/21/97
Relevant Assertions: AS05.10, AS05.20
Relevant Test Requirements: TE05.10.04, TE05.20.04
Relevant Vendor Requirements: VE05.10.01, VE05.20.01


Question/Problem

Assume an embedded or standalone module implements level 3 physical security by applying a tamper response and zeroization mechanism to a removable cover or door. How shall the tester remove the cover/door? What are some conditions under which the applicable test would have "failed" as a result?

Resolution

The tester shall remove the cover/door, where "remove" may consist of opening, prying, or disassembling (e.g., if screws are holding the cover in place, then the screws may be loosened or removed), using a sharp object (e.g., screwdriver, x-acto knife, or other basic instrument). "Remove" shall NOT consist of drilling, milling, burning, melting, grinding or dissolving the cover/door/enclosure, in order to gain access to the circuitry or tamper response mechanism. These types of "attacks" are addressed by Level 4 physical security, where a tamper detection envelope is implemented. In order for the module to pass either TE05.10.04 or TE05.20.04, then the tester shall not be able to disable the tamper response mechanism before it zeroizes plaintext critical security parameters.

(11/21/97)
The tester must determine if Level 3 physical security requirements are met. If fasteners (e.g., rivets, press-fittings, etc.) are used to hold a cover/enclosure in place, and the fasteners are visible to the tester (clearly delineating a mechanism for removal), then it is acceptable for a tester to drill out these fasteners, in order to test the removal of the cover/enclosure for tamper response. Note that drilling can only be performed on the fasteners, and not on the enclosure itself.

In situations where a tester can disable the tamper response mechanism by "removing" the cover/door (as described above) and inserting a physical probe, then the applicable test is failed. If one can use a probe in this manner before zeroization takes place, then it is very likely that a probe could also be used to obtain plaintext critical security parameters. Assertions AS05.11 and AS05.21 address modules that have ventilation slits, and require that these slits be protected to prevent undetected probing. Likewise, the creation of any type of slit or hole during cover/door partial "removal" should also have a similar type of protection to prevent undetected probing (i.e., this protection is the tamper response mechanism).

(11/21/97)
Note that any existing opening revealed by the removal of a fastener may be probed by a tester.

Additional Comments

Note that TE05.10.04 and TE05.20.04 also describe how additional testing is to be done.


Section 6 - Software Security

There is currently no implementation guidance for this section.


Section 7 - Operating System Security

7.1 Authentication of cryptographic software within a cryptomodule

Applicable Levels: ALL
Effective Dates: 2/25/97-
Last Modified:
Relevant Assertions: AS07.02, AS11.14
Relevant Test Requirements: TE07.02.01-.02, TE11.14.03-.04
Relevant Vendor Requirements: VE07.02.01, VE11.14.01


Question/Problem

In cases where the cryptomodule is implemented as software running on a general-purpose computer, must a cryptographic authentication mechanism be applied to software on the computer other than the cryptographic software being validated?

Resolution

No. The requirements under assertion AS07.02 only apply to the cryptomodule software which is being developed and/or modified by the vendor. For example, operating system software such as DOS or Windows need not be authenticated.

Additional Comments


7.2 Level 2 O/S Requirements - Use of TCSEC, ITSEC, and CTCPEC Evaluations

Applicable Levels: 2
Effective Dates: 7/30/97-
Last Modified:
Relevant Assertions: AS07.05
Relevant Test Requirements: TE07.05.01-.02
Relevant Vendor Requirements: VE07.05.01


Question/Problem

For Level 2 operating system requirements, what C2 level operating systems can be used - just those with a TCSEC C2 rating, or do other evaluated O/S's qualify?

Resolution

For the purposes of meeting FIPS 140-1 Level 2 O/S requirements (i.e., C2 or equivalent), a cryptomodule may use an operating system which has been successfully evaluated against one or more of the following criteria:

CRITERIA LEVEL
Trusted Computer Systems Evaluation Criteria (TCSEC) C2
Canadian Trusted Computer Product Evaluation Criteria (CTCPEC) C2 Functionality Profile (Functionality Level)
T1 (Assurance Criteria Level)
Information Technology Security Evaluation Criteria (ITSEC) F-C2 (Functionality Level)
E2 (Assurance Level)

An O/S can be considered as "evaluated" if it appears on the appropriate Evaluated Products List (EPL) from any one of the following countries: United States, Canada, United Kingdom, Germany, France, and The Netherlands. EPLs can be obtained as follows:

NATION ORGANIZATION CONTACT
United States
(TCSEC)
National Security Agency
INFOSEC Awareness Group
Maryland, USA
TEL: (410) 766-8729

TPEP Evaluated Products List

Canada
(CTCPEC)
Communications Security Establishment
ATTN: ITS Publications Administrator
P.O. Box 9703, Terminal
Ottawa, Canada K1G 3Z4
TEL: (613) 991-7409
FAX: (613) 991-7411
EMAIL: criteria@cse.dnd.ca
United Kingdom
(ITSEC)
Certification Body Secretary
UK IT Security and Certification Scheme
P.O. Box 152
Cheltenham GL52 5UF, UK
TEL: +44 1242-238739
FAX: +44 1242-235233
EMAIL: cbsec@itsec.gov.uk

UK ITSEC scheme

Germany
(ITSEC)
Bundesamt fuer Sicherheit in der Informationstechnik
Referat II2/II3
Postfach 20 03 63
D-53133 Bonn, Germany
TEL: +49 228-9582-111
FAX: +49 228-9582-455
EMAIL: zerti@bsi.de
France
(ITSEC)
Service Central de la Securite des Systemes d'Information
Centre de Certification de la Securite des TI
18 rue du docteur Zamenhof
92131 Issy les Moulineaux, France
TEL: +33 1-41463753
FAX: +33 1-41463701
EMAIL: 100565.1335@compuserve.com
The Netherlands
(ITSEC)
Netherlands National Communications Security Agency
P.O. Box 20061
2500 EB The Hague, The Netherlands
TEL: +31 70-3485637
FAX: +31 70-3486503
EMAIL: criteria@nlncsa.minbuza.nl

Additional Comments


Continue to Part 4: sections 8-11